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Datasheet: 8004101FA (National Semiconductor)

DS7831 - Dual Tri-state Line Drivers, Package: Cerdip, Pin Nb=16

 

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National Semiconductor
DS7831/DS8832
Dual TRI-STATE
®
Line Driver
General Description
Through simple logic control, the DS7831/DS8832 can be
used as either a quad single-ended line driver or a dual dif-
ferential line driver. They are specifically designed for party
line (bus-organized) systems. The DS8832 does not have
the V
CC
clamp diodes found on the DS7831.
The DS7831 is specified for operation over the -55°C to
+125°C military temperature range. The DS8832 is specified
for operation over the 0°C to +70°C temperature range.
Features
n
Series 54/74 compatible
n
17 ns propagation delay
n
Very low output impedance -- high drive capability
n
40 mA sink and source currents
n
Gating control to allow either single-ended or differential
operation
n
High impedance output state which allows many outputs
to be connected to a common bus line
Connection and Logic Diagram
TRI-STATE
®
is a registered trademark of National Semiconductor Corp.
Dual-In-Line Package
DS005800-1
Top View
Order Number DS8832J or DS8832N
See NS Package Number J16A or N16A
For Complete Military 883 Specificatons,
See RETS Data Sheet.
Order Number DS7831J/883, DS7831W/883,
See NS Package Number J16A or W16A
May 1999
DS7831DS8832
Dual
TRI-ST
A
T
E
Line
Driver
© 1999 National Semiconductor Corporation
DS005800
www.national.com
Truth Table
(Shown for A Channels Only)
Differential/
"A" Output Disable
Single-Ended
Input A1
Output A1
Input A2
Output A2
Mode Control
0
0
0
0
Logical "1" or
Same as
Logical "1" or
Same as
Logical "0"
Input A1
Logical "0"
Input A2
0
0
X
1
Logical "1" or
Opposite of
Logical "1" or
Same as
1
X
Logical "0"
Input A1
Logical "0"
Input A2
1
X
High
High
X
1
X
X
X
Impedance
X
Impedance
State
State
X = Don't Care
www.national.com
2
Absolute Maximum Ratings
(Note 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage
7V
Input Voltage
5.5V
Output Voltage
5.5V
Storage Temperature Range
-65°C to +150°C
Lead Temperature (Soldering, 4 sec.)
260°C
Maximum Power Dissipation (Note 1) at 25°C
Cavity Package
1433 mW
Molded Package
1362 mW
Operating Conditions
Min
Max
Units
Supply Voltage (V
CC
)
DS7831
4.5
5.5
V
DS8831/DS8832
4.75
5.25
V
Temperature (T
A
)
DS7831
-55
+125
°C
DS8832
0
+70
°C
Note 1: Derate cavity package 9.6 mW/°C above 25°C; derate molded pack-
age 10.9 mW/°C above 25°C.
Electrical Characteristics
(Notes 3, 4)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
V
IH
Logical "1" Input Voltage
V
CC
= Min
2.0
V
V
IL
Logical "0" Input Voltage
V
CC
= Min
0.8
V
V
OH
Logical "1" Output Voltage
DS7831
I
O
= -40 mA
1.8
2.3
V
V
CC
= Min
I
O
= -2 mA
2.4
2.7
V
DS8832
I
O
= -40 mA
1.8
2.5
V
I
O
= -5.2 mA
2.4
2.9
V
V
OL
Logical "0" Output Voltage
DS7831
I
O
= 40 mA
0.29
0.50
V
V
CC
= Min
I
O
= 32 mA
0.40
V
DS8832
I
O
= 40 mA
0.29
0.50
V
I
O
= 32 mA
0.40
V
I
IH
Logical "1" Input Current
V
CC
= Max
DS7831, V
IN
= 5.5V
1
mA
DS8832, V
IN
= 2.4V
40
µA
I
IL
Logical "0" Input Current
V
CC
= Max, V
IN
= 0.4V
-1.0
-1.6
mA
I
OD
Output Disable Current
V
CC
= Max, V
O
= 2.4V or 0.4V
-40
40
µA
I
SC
Output Short Circuit Current
V
CC
= Max, (Note 5)
-40
-100
-120
mA
I
CC
Supply Current
V
CC
= Max in TRI-STATE
65
90
mA
V
CLI
Input Diode Clamp Voltage
V
CC
= 5.0V, T
A
= 25°C, I
IN
= -12 mA
-1.5
V
V
CLO
Output Diode Clamp
Voltage
V
CC
= 5.0V,
I
OUT
= -12 mA
DS7831
-1.5
V
T
A
= 25°C
DS8832
I
OUT
= 12 mA
DS7831
V
CC
+ 1.5
V
Switching Characteristics
T
A
= 25°C, V
CC
= 5V, unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
pd0
Propagation Delay to a Logical "0"
from Inputs A1, A2, B1, B2
13
25
ns
Differential Single-ended Mode
Control to Outputs
t
pd1
Propagation Delay to a Logical "1"
from Inputs A1, A2, B1, B2
13
25
ns
Differential Single-ended Mode
Control to Outputs
t
1H
Delay from Disable Inputs to High
Impedance State (from Logical "1"
(See
Figure 4 and Figure 5 )
6
12
ns
Level)
t
0H
Delay from Disable Inputs to High
Impedance State (from Logical "0" Level)
14
22
ns
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3
Switching Characteristics
(Continued)
T
A
= 25°C, V
CC
= 5V, unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
t
H1
Propagation Delay from Disable Inputs
to Logical "1" Level (from High
14
22
ns
Impedance State)
t
H0
Propagation Delay from Disable Inputs
to Logical "0" Level (from High
18
27
ns
Impedance State)
Note 2: "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. Except for "Operating Temperature Range" they
are not meant to imply that the devices should be operated at these limits. The table of "Electrical Characteristics" provides conditions for actual device operation.
Note 3: Unless otherwise specified min/max limits apply across the -55°C to +125°C temperature range for the DS7831 and across the 0°C to +70°C range for the
DS8832. All typical values are for T
A
= 25°C and V
CC
= 5V.
Note 4: All currents into device pins shown as positive, out of device pins as negative, all voltage referenced to ground unless otherwise noted. All values shown
as max or min on absolute value basis.
Note 5: Applies for T
A
= 125°C only. Only one output should be shorted at a time.
Mode of Operation
To operate as a quad single-ended line driver apply logical
"0"s to the output disable pins (to keep the outputs in the nor-
mal low impedance mode) and apply logical "0"s to both
Differential/Single-ended Mode Control inputs. All four chan-
nels will then operate independently and no signal inversion
will occur between inputs and outputs.
To operate as a dual differential line driver apply logical "0"s
to the Output Disable pins and apply at least one logical "1"
to the Differential/Single-ended Mode Control inputs.
The inputs to the A channels should be connected together
and the inputs to the B channels should be connected to-
gether.
In this mode the signals applied to the resulting inputs will
pass non-inverted on the A
2
and B
2
outputs and inverted on
the A
1
and B
1
outputs.
When operating in a bus-organized system with outputs tied
directly to outputs of other DS7831, DS8832's (
Figure 1), all
devices except one must be placed in the "high impedance"
state. This is accomplished by ensuring that a logical "1" is
applied to at least one of the Output Disable pins of each de-
vice which is to be in the "high impedance" state. A NOR gate
was purposely chosen for this function since it is possible
with only two DM5442/DM7442, BCD-to-decimal decoders,
to decode as many as 100 DS7831, DS8832's (
Figure 2).
The unique device whose Disable inputs receive two logical
"0" levels assumes the normal low impedance output state,
providing good capacitive drive capability and waveform in-
tegrity especially during the transition from the logical "0" to
logical "1" state. The other outputs -- in the high impedance
state -- take only a small amount of leakage current from the
low impedance outputs. Since the logical "1" output current
from the selected device is 100 times that of a conventional
Series 54/74 device (40 mA vs. 400 µA), the output is easily
able to supply that leakage current for several hundred other
DS7831/DS8831's, DS7832/DS8832's and still have avail-
able drive for the bus line (
Figure 3).
DS005800-2
FIGURE 1.
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4
Mode of Operation
(Continued)
DS005800-3
FIGURE 2.
DS005800-4
FIGURE 3.
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5
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